Please use this identifier to cite or link to this item:
https://hdl.handle.net/20.500.11851/6047
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kenney, John G. | - |
dc.contributor.author | Dalton, Declan | - |
dc.contributor.author | Evans, Eric | - |
dc.contributor.author | Eskiyerli, Murat Hayri | - |
dc.contributor.author | Hilton, Barry | - |
dc.contributor.author | Hitchcox, Dave | - |
dc.contributor.author | DeVito, Lawrence | - |
dc.date.accessioned | 2021-09-11T15:34:49Z | - |
dc.date.available | 2021-09-11T15:34:49Z | - |
dc.date.issued | 2006 | - |
dc.identifier.issn | 0018-9200 | - |
dc.identifier.issn | 1558-173X | - |
dc.identifier.uri | https://doi.org/10.1109/JSSC.2006.884344 | - |
dc.identifier.uri | https://hdl.handle.net/20.500.11851/6047 | - |
dc.description.abstract | A 9.95-11.3-Gb/s transceiver in 0.13-mu m CMOS for XFP modules is presented. The CDR uses a dual-loop DLL/PLL with a binary phase detector to exceed XFP jitter specifications. The dual loop solves the problem of having a controlled jitter transfer bandwidth with a binary phase detector. A half rate binary phase detector with a 2:1 serializer implements full-rate I/O. Dispersion jitter from 12" of FR4 is equalized resulting in system JGEN under 4 mUI(RMs) and 35 mUI(PP). Power consumption is 800 mw. | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE-Inst Electrical Electronics Engineers Inc | en_US |
dc.relation.ispartof | IEEE Journal of Solid-State Circuits | en_US |
dc.rights | info:eu-repo/semantics/closedAccess | en_US |
dc.subject | clock and data recovery (CDR) | en_US |
dc.subject | delay-locked loop (DLL) | en_US |
dc.subject | frequency-locked loop (FLL) | en_US |
dc.subject | phase-locked loop (PLL) | en_US |
dc.subject | transceiver | en_US |
dc.title | A 9.95-11.3-Gb/s XFP transceiver in 0.13-mu m CMOS | en_US |
dc.type | Article | en_US |
dc.department | Faculties, Faculty of Engineering, Department of Computer Engineering | en_US |
dc.department | Fakülteler, Mühendislik Fakültesi, Bilgisayar Mühendisliği Bölümü | en_US |
dc.identifier.volume | 41 | en_US |
dc.identifier.issue | 12 | en_US |
dc.identifier.startpage | 2901 | en_US |
dc.identifier.endpage | 2910 | en_US |
dc.authorid | 0000-0002-8692-4727 | - |
dc.identifier.wos | WOS:000242543500028 | - |
dc.identifier.scopus | 2-s2.0-33845681543 | - |
dc.institutionauthor | Eskiyerli, Murat Hayri | - |
dc.identifier.doi | 10.1109/JSSC.2006.884344 | - |
dc.relation.publicationcategory | Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı | en_US |
dc.identifier.scopusquality | Q1 | - |
dc.identifier.wosquality | Q1 | - |
item.languageiso639-1 | en | - |
item.cerifentitytype | Publications | - |
item.fulltext | No Fulltext | - |
item.openairetype | Article | - |
item.grantfulltext | none | - |
item.openairecristype | http://purl.org/coar/resource_type/c_18cf | - |
Appears in Collections: | Bilgisayar Mühendisliği Bölümü / Department of Computer Engineering Scopus İndeksli Yayınlar Koleksiyonu / Scopus Indexed Publications Collection WoS İndeksli Yayınlar Koleksiyonu / WoS Indexed Publications Collection |
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